Standard integrated circuits typically utilize two standard operating input voltage levels: a high input voltage level (V.sub.IH) and a low input voltage level (V.sub.IL). Both levels are set by industry standards, and no special consideration is given whether the circuit is powered with a regulated power supply with very tight tolerances or with an unregulated supply. For a typical dynamic random access memory (DRAM), the industry standard V.sub.Il and V.sub.IH values are -1.0 V to 0.8 V and 2.4 V to 6.5 V. Although DRAMs are typically powered by unregulated supplies having an output voltage that varies from 4.5 V to 5.5 V, compliance with the industry standard input voltage levels is still required.
Notwithstanding the standard power supply voltage range of 4.5-5.5 V, DRAMs of identical design are routinely expected to not only operate with a standard power supply voltage, but to operate with a 3.0 V power supply as well. In addition, during qualification and testing, DRAMs are routinely subjected to much higher voltages than the 5.5 V standard maximum power supply specification. For example, during burn-in testing, the parts are subjected to a maximum power supply specification voltage of 7.5 V and elevated temperatures in order to accelerate the failure of functioning, but terminally-ill parts.
In order to select one of several test modes available on an integrated circuit such as a DRAM, a "super voltage" (i.e., one that is higher than any that the part will experience during any normal mode of operation) is applied at a designated input terminal. Heretofore, super voltage select circuits have been voltage dependent. In other words, the super voltage level that would trip the test mode was proportional to the power supply voltage applied to the part. Thus, the super voltage level for a part operating with a 3.0 V power supply voltage would be considerably lower than for the same part operating with a 7.5 V power supply voltage during burn-in. In the past, this has not presented a serious problem. However, as feature dimensions and film thicknesses in future generations of integrated circuits are reduced in the interest of increased circuit density and decreased power consumption, the super voltage level required to enter a test mode on a part operating with a 7.5 V power supply during burn-in testing may sufficiently high to cause breakdown of dielectric layers and unwanted source-to-drain "punchthrough" in circuitry that is exposed to the super voltage.
What is needed is a new super voltage detection circuit that is voltage independent. In such a circuit, the super voltage trip level will be constant and independent of the power supply voltage. Such a circuit will protect the device against damage which might be occasioned by entering a test mode when operating at high power supply voltage levels.